Cut and paste this URL to share the unmodified register and value:
https://regviz.com/r/Canaan Inc./K210/I2S0/channel3/ror#0x0
Receive Overrun Register
Read this bit to clear RX FIFO data overrun interrupt. 0x0 for RX FIFO write valid, 0x1 for RX FIFO write overrun
https://github.com/cmsis-svd/cmsis-svd-data